Copper/Silicon Alloys

Copper alloys are widely used in applications that call for high thermal/electrical conductivity. Pure copper is extensively used as wires and contacts in electrical applications. The new generation of computer chips employ the use of copper interconnects, thus facilitating reduction of size. Copper is also widely used in high heat flux applications due to its high thermal conductivity. However, copper and its alloys possess low strengths at higher temperatures, thus limiting some of the high temperature applications. A possible way to overcome this limitation is the use of copper containing dispersions of an oxide phase.

Our planned project involves synthesis and detailed microstructural characterization of oxide-dispersed copper alloys with an emphasis on controlling the particle size and distribution and the matrix grain size. The samples, thus produced, will be used as control samples to investigate the effects of microstructural parameters on mechanical behavior of copper alloys containing dispersions; spalling will be one such application.

Dislocations in GaN

GaN is arguably the most exciting development in electronic materials in the past 20 years. The material can be grown by several different methods but in all cases the GaN contains a large density of dislocations. Part of the reason for this high density of defects is the fact that, at present, there exists no ideal substrate for the epitactic growth of the III-V nitrides. Therefore, the material is generally grown on sapphire, SiC, GaAs, or Si substrates. The epitactic relationship between the various substrate orientations and the nitride films is well established. The best epitaxy for GaN on sapphire is obtained using the (0001) sapphire surface. However, neither the lattice parameters nor the coefficients of thermal expansion between the nitrides and their substrate materials match. Hence, most epitactic nitride films are strained and defects are invariably present.

GaN and related nitrides have been used successfully in spite of the high concentrations of defects present. If a cubic compound semiconductor contained a thousandth of this number of defects, the lifetime of any device made with such a material would make it valueless. However, the reason that such defects can be benign is not well understood and there is often disagreement on what the defects actually are. History shows us that it is best to understand such benign defects since we may (and already do) wish to use such materials in situations where their presence will be undesirable.

Our program is a systematic study of dislocations in GaN.

Glass and Interface Migration in Ceramics

This project concerns a detailed investigation of interactions between glass and oxide ceramics at high temperatures. The experimental approach uses controlled geometries and employs a combination of advanced microscopy techniques. Glass/oxide interactions play a critical role in the processing of ceramics by liquid-phase sintering. The alumina/anorthite system is chosen as representative of a system which is commonly present in commercial materials. At high temperatures the glass is liquid. Wetting of the ceramic by the liquid, mass transport in the presence of a liquid, and penetration/exudation of the liquid from a dense ceramic are therefore key basic issues that must be addressed. Bicrystals and tricrystals containing an intergranular glass layer are manufactured by hot-pressing glass-coated single crystals to clean single crystals and provide model geometries for grain boundaries and triple junctions in polycrystalline materials. The bicrystal/tricrystal assembly is annealed at temperatures where the intergranular glass forms a liquid. Conditions under which the intergranular liquid moves from the interior of the sample to the free surface have been established. The dependence on temperature of boundary-wetting parameters and the free-surface wetting parameters can be examined for different grain boundary geometries. Grain boundary migration only takes places when the bounding planes are crystallographically dissimilar.

Metals and Ceramics Bonded to Polymers

Nanoindentation-induced deformation and fracture of thin polystyrene (PS) films on glass substrates were characterized using visible light microscopy (VLM) and atomic force microscopy (AFM). Two film thicknesses, 2 (m and 3.5 (m were studied. It was difficult to induce delamination in the 2 (m film while the 3.5 (m film delaminated easily under indentation loads of 150 mN and higher. AFM cross-section analysis of the deformation and fracture geometry revealed that the ratio of the delamination radius to contact radius was between 3 and 4. Analysis of the fracture surface on the glass side indicates that substrate cracking acts as a trigger for initiation and propagation of interfacial cracks. Crack-arrest marks and process-zone marks were also observed by AFM imaging. The interfacial fracture toughness, or practical work of adhesion, was evaluated following two methods based on the indentation-induced delamination and a process zone analysis. The fracture toughness was found to be approximately 0.6 J/m2 for the 3.5 (m PS film on glass. AFM examination of the glass surface after indentation also showed fine flow lines around the indentation impression, indicating plastic deformation of glass.

Nanoparticles

Our program on nanoparticles currently has three components:

* A NIRT on Superhard Nanostructured Films

* An IGERT on Nanoparticle Science and Engineering

* From SRC: Nanoparticle Devices for Many Level, Multi Material, Single Crystal Systems

The NIRT is a collaboration with 4 Profs from ME and Prof. Gerberich in CEMS.

The IGERT is led by Prof. K and involves 21 UMN Faculty

The SRC program is a seed project:

As integrated circuits scale into the nanometer range, numerous problems arise including gate insulator and junction scaling, and power budgeting. Perhaps the most pervasive problem, however, is interconnect. The number of interconnections is increasing faster than the number of devices. IC manufacturers have gone to many layers of low k / Cu stacks, however, these approaches only delay the inevitable. The smaller the device, the more that performance, density, and yield are interconnect limited. Unless one is willing to impose draconian limits on circuit designers (such as nearest neighbor connections only), conventional FET performance will saturate at about the 30 nm node. Exotic device structures such as coulomb blockade and other single electron devices have significant disadvantages when it comes to charging device interconnect. So-called fat tree approaches espoused by some in the mole cular electronics community overcome a poor device yield only to exacerbate the interconnect problem. Furthermore, digital speeds have led to serious problems associated with propagating RF signals above the lossy silicon substrate. At a system level, the problem is that chips run internal clocks approaching 3 GHz (2.4 GHz will be released by Intel later this year) while board speeds are only a few hundred MHz. This faster chips provide little real advantage.

We propose a radical new approach to the fabrication of electronic and optoelectronic systems: the use of single crystal nanoparticles. It is well known that one can create particles of silicon and other solid materials in the gas phase by homogeneous nucleation. By controlling the process conditions, one can create particles from a few nm up to several hundred nm in diameter (Figure 2). This is the range of sizes of single crystal islands that one would need to build nanodevices. A critical piece of technology for this work was developed at the University of Minnesota in the 1990's. Called an aerodynamic lens, the system allows one to focus particles in an aerosol into a narrow beam that can be sent through a small orifice. This separates the particles from their nucleation and growth ambient. By creating an aerosol of nanoparticles in an arbitrary ambient, one can anneal, dope, oxidize, and perform other high temperature processes with an unlimited thermal budget, then deposit them on a low temperature substrate. Using a nano DMA, which was also developed at the University, one can size select the particles to a standard deviation of about 1% of the mean particle diameter.

Polishing Glass

Polishing is a critical process in the manufacture of many products including lenses, substrates, screens, optical fibers and planarized devices. Polishing implies the smoothing of a surface. This is usually achieved by a combination of chemical and mechanical means and is thus known as chemical/mechanical polishing (CMP). In general, CMP is not well understood and special procedures are developed for each application which can make it difficult to extend the process to new materials.

The most promising polishing compounds are formulations based on ceria. Ceria is extensively used for polishing glass and can polish glass-ceramic precursors. Polishing compounds are rarely pure ceria, although there is disagreement in the literature as to the importance of the presence of other oxides to the effectiveness of the polishing compound. The program will use different formulations of ceria and related oxides which are available commercially or will be prepared in our lab.

One model for CMP of glass by ceria involves the formation of a new layer of silica which is actually deposited from the polishing slurry as other material is removed. A second model is that during polishing, the polishing compound actually bonds to the sample being polished and that subsequent polishing causes separation inside the glass rather than at the bonded interface. Clearly, these processes, if generally necessary and/or applicable, will depend not only on the slurry but also on the structure and chemistry of the material being polished. The polishing medium may be supplied as a slurry or as a fixed abrasive. We will use both approaches.

Polishing Glass-Ceramics

We plan to study the CMP of glass-ceramics. One motivation for studying glass-ceramics is primarily that they are much stiffer than glass, which has great potential for their use in hard-disk-drive platters. Glass-ceramics can also be designed to have negligible thermal expansion. Polishing becomes more difficult because glass-ceramics are neither structurally nor chemically homogeneous. They consist of small crystalline grains with residual glass; the crystallites and the glass differ in composition. Thus, both the chemical and mechanical aspects of the polish can vary locally which is not acceptable for drive platters, for example, where the polished surface must be flat to an Ra of 1nm over the whole disk.

At present, only one paper has been published on CMP of glass-ceramics and we will thus begin with the approach used for polishing glass. One model for CMP of glass by ceria involves the formation of a new layer of silica which is actually deposited from the polishing slurry as other material is removed. A second model is that during polishing, the polishing compound actually bonds to the sample being polished and that subsequent polishing causes separation inside the glass rather than at the bonded interface. Clearly, these processes, if generally necessary and/or applicable, will depend not only on the slurry but also on the structure and chemistry of the material being polished. The polishing medium may be supplied as a slurry or as a fixed abrasive. We will use both approaches.

This program will build on our experience in polishing glass and our work on abrasives, interface reactions and mechanical testing using different forms of indentation. It will extensively use our experience in characterizing materials and the structure/chemistry of surfaces and interfaces. In our group, we have a small program in progress on polishing silica glass and have worked for many years on understanding multicomponent glass in grain boundaries and on surfaces. The glass-ceramics to be examined in the proposed program contain a large fraction of spinel; we have already used a wide range of techniques, especially AFM, low-voltage SEM and TEM, to study the surface of spinel. We use scratch testing and indentation to examine the hardness of crystalline ceramics and glass. In this new program, these tests will be used both to model the polishing process and to study the hardness of ceramic surfaces.

One motivation for studying glass-ceramics is primarily that they are much stiffer than glass, which has great potential for their use in hard-disk-drive platters. Glass-ceramics can also be designed to have negligible thermal expansion. Polishing becomes more difficult because glass-ceramics are neither structurally nor chemically homogeneous. They consist of small crystalline grains with residual glass; the crystallites and the glass differ in composition. Thus, both the chemical and mechanical aspects of the polish can vary locally which is not acceptable for drive platters, for example, where the polished surface must be flat to an Ra of 1nm over the whole disk. Little has been published on CMP of glass-ceramics.

Simulation of Diffraction Contrast

Smart Interfaces

Solid-State Reactions in Oxides